The edge reasoning Accelerator developed by Flexlogix has a 4k MAC dynamic tensor processor array that can be used for M-pixel image processing models in medical, surveillance, and Internet of things applications.
The InferX X1 Edge reasoning Accelerator is designed to handle real-time M-pixel visual workloads and requires high bandwidth support for deep learning models for real-time small batch operations. The company explained that a typical workload has a deep network of many feature mappings and multiple operator types. They may also have model precision goals that require mixed-precision, including INT 8, INT 16, and BF 16. Accelerators allow for interlayer mixing and are designed for the low-latency batch processing that these workloads typically require (Basil inference processing).
The accelerator supports the selection of x86 and Arm architectures and operating systems. It supports camera, infrared, ultrasonic, and RF sensor input types and Ethernet, USB, and Wi-Fi communication standards.
The X1 dynamic tensor processor array is designed to support existing and future AI / ML models, and claims to combine speed and efficiency of ASIC with reconfigurable control logic technologies in the future by enabling the adoption and deployment of new inference model technologies through field updates. The accelerator architecture supports the processing of multiple data types, including high-resolution cameras.
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https://www.easybom.com/blog/a/edge-reasoning-accelerator-focuses-on-the-visual-system-of-megapixels
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