How does flash memory technology solve the problem of operating system performance degradation?

Rachel Anne Rachel Anne 30 November 2021 Follow
How does flash memory technology solve the problem of operating system performance degradation?

Why use an embedded operating system

For some IoT applications, the more preprocessing that can be performed on remote IoT nodes, the fewer data the IoT nodes need to transmit back to the central hub, which can free up network bandwidth. The pre-tested embedded operating system can support complex preprocessing by effectively processing a large number of individual tasks, and handling multiple tasks in a predictable (deterministic) manner. Of course, this will place additional requirements on the microcontroller, requiring faster clock speeds, and more importantly, more program memory.

Another advantage of commercial or open-source finished embedded operating systems is the use of pre-tested and reliable code that rarely needs to be updated. For example, the available embedded Linux operating system may only be updated quarterly, or only emergency security patches may be installed. The embedded operating system and the required application code may require 8 Gb or more storage space. Since the operating system is rarely updated, it is more convenient to store the operating system on a microSDHC flashcard that is manually (physically) updated by a technician. This also applies to future memory expansion, because the next time a technician visits, the existing 4 GB flash memory card can be easily replaced with an 8 Gb or larger capacity card as needed.

Storing gigabytes of the embedded operating systems on a manually updated microSDHC NAND flash memory card has several advantages compared to flash memory that is updated over a wireless network. In wireless networks, depending on the arbitration scheme used, updating an embedded operating system of 4 GB or more may result in the theft of wireless bandwidth from operational communications. Updating over the network also requires a microSDHC card with twice the normal capacity, because it requires enough storage space to run the operating system and accommodate incoming updates.

Due to radioactivity and higher flash write voltage and power requirements, updating flash code wirelessly will also shorten battery life.


Compared with data storage, the embedded operating system executed from the flash memory also puts forward different requirements on the flash memory unit. Most commercially available flash memory microSDHC cards are designed by manufacturers for data storage. The most common commercial use is multimedia storage for mobile devices. Although multiple bit errors in the video, image or audio files may be ignored by end-users, as long as a one-bit error in a key embedded operating system file, it may cause the entire system to malfunction.

The life of flash memory is limited. Each writes operation to the flash memory array shortens the life of the array. Each semiconductor flash memory specification lists a limited number of erasing and write cycles. As the flash memory cell approaches the prescribed limit, the possibility that the cell wears out and does not accept the new programming state becomes more and more likely.

Wear leveling is a common method to prevent performance degradation of flash memory arrays due to write operations. The writing is not written to the same flash memory location but is evenly distributed on the entire flash semiconductor memory array, ensuring that the written content is evenly distributed in the flash memory matrix. Through wear leveling, when the microcontroller writes to a single location in the physical memory, the flash memory controller can map that location to a different location in the flash memory array.

How does flash memory technology solve the problem of operating system performance degradation?

How read disturb errors occur

The access frequency of operating system files is much higher than that of data files, so file bit errors cannot be tolerated. In some cases, the core operating system files may be constantly read, thereby introducing bit errors in the flash memory array.

Flash memory is arranged in blocks, and each block contains many pages. For memory, a block is the smallest part that can be erased, and a page is the smallest part that can be read or programmed. The general size of a flash block is 256 KB, and each block can contain 64 pages, each with 4 KB. Each page also includes an additional 64 bytes for error correction code (ECC), erasure count, and logic to physical conversion information.

During a flash memory read operation of one page of data, even if only one byte in the page needs to be read, a small read voltage will be applied to the entire block to which the page belongs. Due to the flash memory processing unit technology, a smaller voltage will also be generated in the surrounding pages in the block. This can inject electrons into the cell insulating layer, similar to programming the cell, which is why it is called "soft programming". Repeated application of a smaller read voltage to the same block may eventually interfere with the programming of the flash memory page that is not being read. Over time, this may result in changing the state of neighboring cells to different values.

Although most NAND flash microSDHC cards have some form of error correction function to correct cell errors, the number of errors caused by soft programming may be so large that it reaches a critical level that cannot be corrected, causing the microcontroller to read from the bit position. Taking different values ​​will cause file corruption errors. These bit errors are called read disturb errors.

NAND flash microSDHC cards used for data storage rarely experience read interference errors. When performing a write operation on the flash memory array, after the wear-leveling operation, the flash memory location is reprogrammed, thus eliminating any soft programming effects. However, flash arrays used in embedded operating systems are rarely programmed, which makes read disturb errors a reality.

Single-level memory cell (SLC) flash memory cards are rated for one million reads, and multi-level memory cell (MLC) flash memory cards are rated for 100,000 reads before a read interference error occurs. For data flash memory, read disturb errors are considered so rare that these numbers are usually not specified in the datasheet.

Use RDM to prevent read interference errors

In order to prevent read disturbance errors, Swissbit has developed a function called Read Disturbance Management (RDM). In Swissbit's RDM, the flashcard controller keeps track of the number of reading operations for each flash block. When the block reaches the internally defined number of reading operations, the controller moves the data to the new block, similar to wear leveling used for write operations. If necessary, the SD controller's error correction code (ECC) corrects any corrupted data during the write operation to the new block.

Swissbit's SFSD8192N1BM1MT-I-QG-221-STD 8 GB S-450u UHS-I Class 10 microSDHC flash memory card has implemented RDM. S-450u is specially designed for industrial applications that use embedded operating systems. It has enough space for embedded Linux operating systems and application code in many complex IoT nodes. In SDR104 mode, S-104u can support data access speeds up to 104 Mb/s.


Although flash memory microSDHC cards were often used for data storage in the past, improvements are currently being sought to support the unique requirements of embedded operating systems to execute program memory within the chip. Part of this evolution includes the development of faster flash memory that can support continuous read requests. In addition, microcontrollers are evolving to support new memory interfaces that can reliably execute code from external microSDHC cards, while reducing or eliminating flash memory errors.

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