If you're a PC enthusiast, you probably know that the main way that our PCs, our phones and our consoles have gotten faster over the years, is through shrinking transistor sizes on our processors.
Indeed, we have gone from using 250 nanometer chips in the mid 1990s to just seven nanometer models today. And that number is expected to keep shrinking, but this was not achieved simply by taking the exact same transistor design and shrinking it every couple of years. Instead, engineers, I've had to get creative with how to build transistors in order to pull this off. One major innovation was FinFET. This is a type of transistor in which the channel the electrons move through is raised up off the substrate. Kind of like a shark's fin, increasing the surface area and allowing more electrons to flow. But now we're getting to the point where FinFET is reaching its limits in terms of how tightly we can pack the transistors together, which means the industry is going to need to move to a new transistor design for future generations of high performance chips.
Enter Gate-all-around, a super boring name for a super cool update to the FinFET concept. Similar to FinFET, the channel is raised up off the substrate, but instead of being one large fin like piece, it's broken up into several pieces called nanoribbons
So Gate-all-around design increases the surface area so that the gate that controls the current flow surrounds the nanoribbon on all sides. Hence, the name Gate-all-around. This is hugely important for a few reasons actually, you see the gate's ability to control current, depends on the physical size of the channel, and a single bulky fin can be hard to control. At present transistor sizes, it's not a huge problem, but if we kept shrinking FinFET transistors even further, the lack of control would introduce leakage which would interfere with, and possibly corrupt your data flow.
But with Gate-all-around, the smaller nanoribbons means the gate has a much easier time controlling the current flow, allowing for more tightly packed transistors. On top of that, you can stack the nanoribbons, see what we did there, which takes up less space than adding more fins in FinFET, which required you to put the fins next to each other instead. Another big advantage is that if a certain processor design requires more power you can simply make the nanoribbons wider laterally.
With FinFET, each fin could carry a discreet amount of current. So if a design needed say 5X current, but each FinFET could only carry 2X, you'd have to have three fins with the capacity of 6X, a design that wasted space. However, you can make a nanoribbon just as wide as you need saving valuable room on the transistor. And the best part is that you don't need super exotic materials in order to pull this off, it can be done with a silicon germanium alloy, which is way more basic than it sounds, meaning that it shouldn't be too difficult for large chip makers to produce Gate-all-around chips in bulk.
On that subject, when should we see Gate-all-around transistors hitting the market? Well, it should be within the next five years, across all vendors, but it'll probably appear in data center and server applications before it trickles down to consumers, like you and me. But once it does, we're going to see the expected benefits that we're used to with smaller transistors, like faster computing, better battery life, lower power consumption and an ability for devices like laptops and phones to better handle tasks without having to rely as much on cloud computing.
I wonder how much better it might make our games as well. Assuming we can get nanoribbon GPUs from someone other than an eBay scalper when the time does come.
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