Ethernet Physical Layer Transceiver LAN8720A: Pinout, Specification, Application

Ethernet Physical Layer Transceiver LAN8720A: Pinout, Specification, Application
4 min read
21 December 2021

General Description


LAN8720A/LAN8720AI is an all-around 10/100Mbps Ethernet physical layer transceiver with small size and low power consumption, which is designed for consumer electronics and enterprise applications. It supports communication with Ethernet MAC through a standard RMII interface. LAN8720A/LAN8720AI can realize the best connection mode (speed and duplex mode) with the destination host through auto-negotiation and supports HP Auto-MDIX automatic flip function, and the connection can be changed to a direct connection or cross-connection without changing the network cable.


According to the IEEE 802.3-2005 standard, the withstand voltage of all digital interface pins is 3.6V. The LAN8720A/LAN8720AI can be configured to run on a single 3.3V power supply using an integrated 3.3V to 1.2V linear regulator. The linear regulator can be selectively disabled, allowing the use of a high-efficiency external regulator to reduce system power consumption. It supports the RMII interface to reduce the number of pins. Besides, it supports full-duplex and half-duplex mode and SMI serial management interface.


LAN8720A/LAN8720AI is suitable for set-top boxes, network printers and servers, test instruments, LAN on motherboards, embedded telecommunications applications, video recording/playback systems, cable modems/routers, DSL modems/routers, digital video recorders, IP and video phones, wireless access points, digital TVs, digital media adapters/servers, game consoles, and POE applications.

Architectural Overview

Architectural Overview

Pinout Configuration and Description

Pinout configuration

LAN8720A pinout

Pinout description

The number of pins of LAN8720A is relatively small, so many pins have multiple functions. Here, we introduce several important settings.

1. PHY chip address setting

The LAN8720A can be configured through the PHYAD0 pin. This pin is multiplexed with the pin RXER. The chip has a pull-down resistor. When the hard reset is completed, the LAN8720A will read the pin level as the device's SMI address. When connecting a pull-down resistor (floating is also possible, because the chip has a built-in pull-down resistor), set the SMI address to 0, and set it to 1 after an external pull-up resistor. In this chapter, we use this pin to float, that is, set the LAN8720A address to 0.

2. NT/REFCLKO pin function configuration

The NT/REFCLKO pin can be used as interrupt output or reference clock output. Through the LED2 (nINTSEL) pin configuration, the value of the LED2 pin is read by the LAN8720A after the chip is reset. When the pin is connected to a pull-up resistor (or floating, with a built-in pull-up resistor), then after normal operation, nINT The /REFCLKO pin will be used as an interrupt output pin (select REF-CLK IN mode). When this pin is connected to a pull-down resistor, after the normal operation, the NT/REFCLKO pin will be used as a reference clock output (select REF-CLK OUT mode).

In the REF-CLK IN mode, an external 50Mhz reference clock must be provided to the XTAL1 (CLKIN) pin of the LAN8720A.

In the REF-CLK OUT mode, the LAN8720A can be connected to a 25Mhz quartz crystal, which is multiplied internally to 50Mhz, and then through the REFCLKO pin, it outputs a 50Mhz reference clock to the MAC controller. In this way, the BOM cost can be reduced.

3. 1.2V internal regulator configuration

LAN8720A needs 1.2V voltage to power VDDCR, but the chip integrates a 1.2V voltage regulator. You can configure whether to use the internal voltage regulator through LED1 (ROGOFF). When the internal voltage regulator is not used, 1.2V must be provided externally to the VDDCR pin. Here we use the internal voltage regulator, so we connect a pull-down resistor to LED1 (floating is also OK, with a built-in pull-down resistor) to control the opening of the internal 1.2V regulator.

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kate 403
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